| 发明名称 |
ERROR CORRECTION IN MEMORY |
| 摘要 |
Apparatus, systems, and methods for error correction in memory are described. In one embodiment, a memory controller comprises logic to load an error correction codeword retrieved from a memory and apply a first error correction decoder to decode the error correction codeword, wherein the first error correction decoder implements a bit-flipping error correction algorithm which utilizes a variable bit-flipping threshold to determine whether to flip a bit in an error correction codeword. Other embodiments are also disclosed and claimed. |
| 申请公布号 |
US2015188570(A1) |
申请公布日期 |
2015.07.02 |
| 申请号 |
US201314141215 |
申请日期 |
2013.12.26 |
| 申请人 |
Kwok Zion S.;Lei Andre;Nelson Scott |
发明人 |
Kwok Zion S.;Lei Andre;Nelson Scott |
| 分类号 |
H03M13/11;G06F11/10 |
主分类号 |
H03M13/11 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A controller comprising logic to:
load an error correction codeword retrieved from a memory; and apply a first error correction decoder to decode the error correction codeword, wherein the first error correction decoder implements a bit-flipping error correction algorithm which utilizes a variable bit-flipping threshold to determine whether to flip a bit in an error correction codeword. |
| 地址 |
Burnaby CA |
