发明名称 METHOD AND APPARATUS OF A THREE DIMENSIONAL INTEGRATED CIRCUIT
摘要 An apparatus includes a first tier and a second tier. The second tier is above the first tier. The first tier includes a first cell. The second tier includes a second cell and a third cell. The third cell includes a first ILV to couple the first cell in the first tier to the second cell in the second tier. The third cell further includes a second ILV, the first ILV and the second ILV are extended along a first direction. The first tier further includes a fourth cell. The second tier further includes a fifth cell. The second ILV of the third cell is arranged to connect the fourth cell of the first tier with the fifth cell of the second tier. In some embodiments, the second tier further includes a spare cell including a spare ILV for ECO purpose.
申请公布号 KR20150073861(A) 申请公布日期 2015.07.01
申请号 KR20140184674 申请日期 2014.12.19
申请人 TAIWAN SEMICONDUCTOR MANUFACTURING CO., LTD. 发明人 CHANG CHI WEN;LEE HUI YU;LIU YA YUN;KUAN JUI FENG;CHENG YI KAN
分类号 H01L23/48;H01L25/065 主分类号 H01L23/48
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