发明名称 Semiconductor device with a depletion channel and method of manufacturing the same
摘要 According to embodiments, a semiconductor device includes a semiconductor substrate and an element isolation insulating film which isolates a element formation region in a surface portion of the semiconductor substrate. A depletion-type channel region of a first conductivity type is formed in an inner region which is in the element formation region of the semiconductor substrate and is a predetermined distance or more away from the element isolation insulating film. A gate electrode is formed above the element formation region with a gate insulating film located in between in such a manner as to traverse over the channel region and to overlap with portions of the element isolation insulating film which are located on both sides of the element formation region. Source/drain regions of the first conductivity type are formed in the channel region respectively on both sides of the gate electrode.
申请公布号 US9070769(B2) 申请公布日期 2015.06.30
申请号 US201113184654 申请日期 2011.07.18
申请人 Kabushiki Kaisha Toshiba 发明人 Kato Yoshiki
分类号 H01L27/12;H01L29/78;H01L21/033;H01L21/762;H01L29/10 主分类号 H01L27/12
代理机构 Oblon, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A semiconductor device comprising: a semiconductor substrate; an element isolation insulating film which isolates an element formation region in a surface portion of the semiconductor substrate; a depletion-type channel region of a first conductivity type formed in an inner region which is in the element formation region of the semiconductor substrate of a second conductivity type and is spaced apart from the element isolation insulating film; a gate electrode formed above the element formation region with a gate insulating film located in between in such a manner as to traverse over the channel region and to overlap with portions of the element isolation insulating film which are located on both sides of the element formation region; source/drain regions of the first conductivity type which are formed in the channel region respectively on both sides of the gate electrode; and wherein D/W is equal to or more than 0.01 or 1% when the ratio D/W is expressed in percentage, where W is a distance of a portion of the element formation region over which the gate electrode traverses, and D is a distance between the channel region and the element isolation insulating film.
地址 Tokyo JP