发明名称 |
DIGITAL SYNTHESIZABLE LOW DROPOUT REGULATOR WITH ADAPTIVE GAIN |
摘要 |
Described is a voltage regulator with adaptive gain, which comprises: a plurality of power-gate transistors controllable by a digital bus, the plurality of power-gate transistors operable to provide a first power supply to a load, and to receive a second power supply as input; an analog-to-digital converter (ADC) to receive the first power supply and to generate a digital output representative of the first power supply; and a controller to receive the digital output representative of the first power supply and to generate the digital bus for controlling the plurality of power-gate transistors such that a transfer function of the plurality of power-gate transistors is substantially linear over an operating range. |
申请公布号 |
WO2015094252(A1) |
申请公布日期 |
2015.06.25 |
申请号 |
WO2013US76298 |
申请日期 |
2013.12.18 |
申请人 |
INTEL CORPORATION |
发明人 |
MUTHUKARUPPAN, RAMNARAYANAN;PATRA, PRADIPTA;GOEL, GAURAV;KADALI, UDAY BHASKAR |
分类号 |
G06F1/26 |
主分类号 |
G06F1/26 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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