| 发明名称 |
SYSTEM FOR EFFICIENT CACHING OF SWAP I/O AND/OR SIMILAR I/O PATTERN(S) |
| 摘要 |
An apparatus comprising a memory and a controller. The memory may be configured to (i) implement a cache and (ii) store meta-data. The cache may comprise one or more cache windows. Each of the one or more cache windows comprises a plurality of cache-lines configured to store information. The controller is connected to the memory and configured to (A) process normal read/write operations in a first mode and (B) process special read/write operations in a second mode by (i) tracking a write followed by read condition on each of said cache windows and (ii) discarding data on the cache-lines associated with the cache windows after completion of the write followed by a read condition on the cache-lines. |
| 申请公布号 |
US2015178201(A1) |
申请公布日期 |
2015.06.25 |
| 申请号 |
US201414145943 |
申请日期 |
2014.01.01 |
| 申请人 |
LSI Corporation |
发明人 |
Sampathkumar Kishore Kaniyar;Purkayastha Saugata Das;Maharana Parag R. |
| 分类号 |
G06F12/08 |
主分类号 |
G06F12/08 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. An apparatus comprising:
a memory configured to (i) implement a cache and (ii) store meta-data, said cache comprising one or more cache windows, each of said one or more cache windows comprising a plurality of cache-lines configured to store information; and a controller connected to said memory and configured to (A) process normal read/write operations in a first mode and (B) process special read/write operations in a second mode by (i) tracking a write followed by a read condition on each of said cache windows and (ii) discarding data on said cache-lines associated with said cache windows after completion of the write followed by the read condition on the cache-lines. |
| 地址 |
San Jose CA US |
