Charge breakdown avoidance for MIM elements in SOI base technology and method

摘要

A semiconductor device including at least one capacitor formed in wiring levels on a silicon-on-insulator (SOI) substrate, wherein the at least one capacitor is coupled to an active layer of the SOI substrate. A method of fabricating a semiconductor structure includes forming an SOI substrate, forming a BOX layer over the SOI substrate, and forming at least one capacitor in wiring levels on the BOX layer, wherein the at least one capacitor is coupled to an active layer of the SOI substrate.

主权项

1. A semiconductor structure, comprising:
at least one capacitor formed in wiring levels on a silicon-on-insulator (SOI) substrate, which is coupled to an active layer of the SOI substrate; a first lateral diode in the active layer of the SOI substrate, wherein a first plate of the at least one capacitor is connected by first wiring to the first lateral diode; and a second lateral diode in the active layer of the SOI substrate, wherein a second plate of the at least one capacitor is connected by second wiring to the second lateral diode.