发明名称 |
HIGH SPEED SERIAL PERIPHERAL INTERFACE MEMORY SUBSYSTEM |
摘要 |
A memory subsystem is disclosed. The memory subsystem includes a serial peripheral interface (SPI) double data rate (DDR) volatile memory component, a serial peripheral interface (SPI) double data rate (DDR) non-volatile memory component coupled to the serial peripheral interface (SPI) double data rate (DDR) volatile memory component and a serial peripheral interface (SPI) double data rate (DDR) interface. The serial peripheral interface (SPI) double data rate (DDR) interface accesses the serial peripheral interface (SPI) double data rate (DDR) volatile memory component and the serial peripheral interface (SPI) double data rate (DDR) non-volatile memory component where data is accessed on leading and falling edges of a clock signal. |
申请公布号 |
EP2788984(A4) |
申请公布日期 |
2015.06.10 |
申请号 |
EP20120854967 |
申请日期 |
2012.12.07 |
申请人 |
SPANSION LLC |
发明人 |
WIDMER, KEVIN;ZITLAW, CLIFF;LE, ANTHONY |
分类号 |
G11C7/10;G06F13/40;G06F13/42;G11C5/02 |
主分类号 |
G11C7/10 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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