发明名称 Methods and apparatus for memory interface systems
摘要 Methods and systems for memory interface systems are provided. A first command from control circuitry is received by bridge circuitry at a first clock rate. The control circuitry is configured to operate at the first clock rate. A second command is generated by the control circuitry on the received first command. The second command is transmitted to memory circuitry at a second clock rate. The memory circuitry is configured to operate at the second clock rate, and the second clock rate is greater than the first clock rate.
申请公布号 US9053777(B1) 申请公布日期 2015.06.09
申请号 US201213661849 申请日期 2012.10.26
申请人 Altera Corporation 发明人 Crosland Andrew;Davies Clive
分类号 G11C8/00;G11C7/22;G11C7/10 主分类号 G11C8/00
代理机构 Ropes & Gray LLP 代理人 Ropes & Gray LLP
主权项 1. A system comprising bridge circuitry, wherein the bridge circuitry is configured to: receive a first command from control circuitry at a first clock rate, wherein: the control circuitry comprises programmable circuitry, andthe control circuitry is configured to operate at the first clock rate; generate a second command based on the received first command; and transmit the second command to memory circuitry at a second clock rate, wherein: the memory circuitry comprises dynamic random access memory (DRAM) circuitry,the memory circuitry is configured to operate at the second clock rate, andthe second clock rate is greater than the first clock rate.
地址 San Jose CA US
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