BIT LINE SENSING METHODS OF MEMORY DEVICES

摘要

Bit line sensing methods may be provided. The methods may include pre-charging a first bit line and a second bit line with a bit line pre-charge voltage. The first bit line may be connected to a first input terminal of a first inverter, and the second bit line may be connected to a second input terminal of a second inverter. The method may also include adjusting voltages of the first bit line and the second bit line corresponding to either threshold voltages of first and second pull-down circuits included in the first and second inverters respectively or threshold voltages of first and second pull-up circuits included in the first and second inverters respectively. The method may further include sharing charges of one of the first bit line and the second bit line with charges of a corresponding memory cell and amplifying a voltage difference between the first bit line and the second bit line.

主权项

1. A bit line sensing method, the method comprising:
pre-charging a first bit line and a second bit line with a bit line pre-charge voltage, wherein the first bit line is connected to a first input terminal of a first inverter, and the second bit line is connected to a second input terminal of a second inverter; adjusting voltages of the first bit line and the second bit line corresponding to either threshold voltages of first and second pull-down circuits included in the first and second inverters respectively or threshold voltages of first and second pull-up circuits included in the first and second inverters respectively; sharing charges of one of the first bit line and the second bit line with charges of a corresponding memory cell; and amplifying a voltage difference between the first bit line and the second bit line.