发明名称 Perfectionnements apportés aux circuits électriques
摘要 867,813. Circuits employing bi-stabie ferroelectric elements. NATIONAL CASH REGISTER CO. June 5, 1959 [June 11, 1958], No. 19248/59. Class 40 (9). [Also in Groups XIX and XL (b)] In a shift register, Fig. 1, a pulse train 40 is entered at terminal 38 to parallel circuits, each containing ferro-electric (F.E.) capacitors 20, 21 and cadmium sulphide photo-conductive (P.C.) cells 32 and to a final parallel circuit containing one F.E. capacitor only and direct connection of P.C. cell 32 to point 34. Stored information is available across resistors 35. Cross-connections between the parallel circuits is made by P.C. cells 42. Information enters the register serially through P.C. cell 41 of the first stage or in parallel via P.E. cells 41 of all stages. P.C. cells 32 and 42 are illuminated in coincidence with the B and A excursions respectively of signal 40; the light sources may be electro-luminescent elements. The polarization direction switching of F.E. capacitors 20, 21 takes place according to the following rules: when the polarization directions are (i) opposed, neither is switched by any applied pulse, (ii) both upward, both are switched by a negative input, and (iii) both downward, both are switched by a positive input. In the initial conditions of the register the polarization directions in all stages are as shown in the first stage after a sufficient number of A, B reversals of pulse train 40. For entry of a binary one into the first stage P.C. cell 41 associated therewith is illuminated during an A excursion of the pulse train, thus reversing the polarization of first stage capacitor 20. At the ensuing B excursion both first stage capacitor polarizations are switched and on the following A excursion both second stage capacitor polarizations are downward and the first stage capacitor polarization is reversed. Thus the entered binary one has been shifted to the second stage and the first stage re-set to binary zero. Similarly a binary one entered into any stage by illuminating the associated P.C. cell 41 during an A excursion will be shifted along the register and appear on the last stage for take-off at terminal 43 during a B excursion. By insertion of a F.E. capacitor at 44 in the final stage and connection of a P.C. cell between the capacitor's upper terminal and point 31 of the first stage a ring counter is formed. Constructional details.-Conductors 51, resistors 60, and P.C. cells 54, 55, 56 are deposited, printed or plated on insulating and obturating base 50, Fig. 4, and terminal pairs 57, 58 receive barium titanate F.E. capacitors. P.C. cells 54 are illuminated selectively through apertures 65 obturated by shutters 67. In an alternative construction the base is a single slab of F.E. material and the conductors &c. are plated or deposited directly on it, Fig. 6 (not shown). Specification 856,960 is referred to.
申请公布号 FR1226919(A) 申请公布日期 1960.08.18
申请号 FR19590796952 申请日期 1959.06.09
申请人 THE NATIONAL CASH REGISTER COMPANY 发明人 ANDERSON JOHN R.
分类号 G11C19/00;G11C19/30 主分类号 G11C19/00
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