发明名称 Semiconductive micro- and nano-wire array manufacturing
摘要 The disclosure provides methods of manufacturing semiconductive structures using stamping and VLS techniques.
申请公布号 US9048097(B2) 申请公布日期 2015.06.02
申请号 US201313972809 申请日期 2013.08.21
申请人 California Institute of Technology 发明人 Warren Emily L.;Audesirk Heather A.;Lewis Nathan S.
分类号 H01L21/02 主分类号 H01L21/02
代理机构 Gavrilovich, Dodd & Lindsey LLP 代理人 Baker, Jr. Joseph R.;Gavrilovich, Dodd & Lindsey LLP
主权项 1. A method for fabricating semiconductor structures comprising the steps of: (a) contacting a semiconductive substrate having a thermal oxide layer with a stamp comprising agarose containing hydrofluoric acid and wherein the agarose stamp has a pattern of structures extending from the planar surface of the agarose approximately equal to the depth of the thermal oxide layer on the semiconductive substrate, wherein the stamp imprints the negative of the pattern into the thermal oxide layer; (b) removing the stamp from the semiconductive substrate; (c) electrodepositing a catalyst into patterned openings directly onto the semiconductive substrate; and (d) growing a set of semiconductor structures on the substrate, wherein the semiconductor structure growth is supported by a catalyst deposited in the openings.
地址 Pasadena CA US