SEMICONDUCTOR PACKAGE

摘要

A semiconductor package with reduced warpage problem is provided, including: a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension less than that of the first cross sectional dimension; a non-planar shaped heat spreading layer, formed over the spacer; an encapsulant layer, formed, over the circuit board, filling spaces between the non-planar shaped heat spreading layer and the circuit board; and a plurality of solder balls, formed over the second surface of the circuit board.

主权项

1. A semiconductor package, comprising:
a circuit board, having opposing first and second surfaces; a semiconductor chip, formed over a center portion of the first surface of the circuit board; a spacer, formed over a center portion of the semiconductor chip, having a second cross sectional dimension that is less than that of the first cross sectional dimension; a non-planar shaped heat spreading layer, formed over the spacer, comprising a planar portion covering a top surface of the spacer and a plurality of sloped portions respectively connecting an end of the planar portion with a portion of the circuit board; an encapsulant layer, formed, over the circuit board, filling spaces between the non-planar shaped heat spreading layer and the circuit board and covering a top surface of the plurality of sloped portions of the non-planar shaped heat spreading layer; and a plurality of solder balls, formed over the second surface of the circuit board.