SPREAD SPECTRUM CLOCK GENERATOR AND CONTROL METHOD THEREOF

摘要

PROBLEM TO BE SOLVED: To provide a spread spectrum clock generator that reduces fractional spurious.SOLUTION: A fractional N-PLL synthesizer 101 is formed from: a VCO 115; a fractional divider 112 that is interposed into a feedback path of an output signal of the VCO 115 and generates a divider output signal of a decimal frequency division number; an accumulator 120 that supplies to the fractional divider 112 an overflow signal for periodically switching the frequency division number; and a phase detector 140 that generates a signal for controlling the VCO 115 on the basis of a phase difference between the divider output signal and a reference signal. A spread control circuit 130 is then provided that generates an addition value signal for temporally changing the decimal frequency division number. The accumulator 120 generates an error signal including fractional phase error information, and the phase detector corrects the phase difference between the divider output signal and the reference signal by using the error signal.