发明名称 METHOD, SYSTEM, AND COMPUTER PROGRAM PRODUCT FOR MODELING RESISTANCE OF A MULTI-LAYERED CONDUCTIVE COMPONENT
摘要 Disclosed is a technique for modeling resistance of a conductive component of a device, where the component comprises multiple conductive materials. If necessary (e.g., for a complex conductive component), the component is divided into multiple conductive regions. For a given conductive region, current flow-through and current flow-in-and-terminate axes are determined and the conductive region is divided into layers. Relative electric currents flowing along the current flow-through axis in each layer and along the current flow-in-and-terminate axis in each layer are evaluated to determine a total resistance value for the conductive region. For a complex conductive component, these processes are repeated for all conductive regions and an overall resistance value is determined based on the corresponding total resistance values and, as calculated for each conductive region, a ratio of maximum electric current flowing in/out of the conductive region to the total electric current flowing out of the complex conductive component.
申请公布号 US2015143325(A1) 申请公布日期 2015.05.21
申请号 US201314084652 申请日期 2013.11.20
申请人 International Business Machines Corporation 发明人 Lu Ning
分类号 G06F17/50 主分类号 G06F17/50
代理机构 代理人
主权项 1. A modeling method comprising: accessing, by at least one processor of a computer system from a memory, a design for a semiconductor device comprising a conductive region, said conductive region comprising multiple conductive materials; determining, by said processor, a current flow-through axis associated with said conductive region and a current flow-in-and-terminate axis associated with said conductive region; dividing, by said processor, said conductive region into layers for evaluation purposes; evaluating, by said processor, relative electric currents flowing along said current flow-through axis and along said current flow-in-and-terminate axis in each of said layers in order to determine a total resistance value for said conductive region; generating, by said processor, a netlist for said semiconductor device using said total resistance value; and simulating, by said processor, performance of said semiconductor device using said netlist.
地址 Armonk NY US