VECTOR GENERATE MASK INSTRUCTION

摘要

A Vector Generate Mask instruction. For each element in the first operand, a bit mask is generated. The mask includes bits set to a selected value starting at a position specified by a first field of the instruction and ending at a position specified by a second field of the instruction.

主权项

1. A method of executing a machine instruction in a central processing unit, the method comprising:
obtaining, by a processor, a machine instruction for execution, the machine instruction being defined for computer execution according to a computer architecture, the machine instruction comprising:
at least one opcode field to provide an opcode, the opcode identifying a Vector Generate Mask operation;a first register field to be used to designate a first register, the first register comprising a first operand;a first field to specify a starting position; anda second field to specify an ending position; and executing the machine instruction, the executing comprising:
generating a mask for one or more elements of the first operand, the generating comprising setting one or more positions in the mask to a predefined value beginning at the starting position in the mask and ending at the ending position.