Capacitance Minimization Switch

摘要

A CMOS transmission gate that is compensated for lost current to parasitic capacitance. Parasitic capacitance current is detected by an amplifier and fed back in-phase to the input of the CMOS transmission gate with the gain of the amplifier set to avoid circuit instability. In a first example a transconductance amplifier detects a voltage drop across a resistor in and RC network and the resulting current applied to the input of the transmission gate. A second example uses a current amplifier to detect gate current of the N-channel and P-channel transistors of the transmission gate, and an output current is fed back in phase to the input of the CMOS transmission gate.

主权项

1. A capacitance minimization circuit, comprising:
a) a CMOS transmission gate comprising signal loss caused by parasitic capacitance; b) an amplifier circuit that detects said signal loss; and c) said amplifier capable of feeding back to an input, or output, of the CMOS transmission gate a signal loss caused by the parasitic capacitance.