发明名称 SEMICONDUCTOR DEVICE AND METHOD OF SEARCHING FOR ERASURE COUNT IN SEMICONDUCTOR MEMORY
摘要 In response to a search start instruction, a read address signal including address sequences for blocks is generated and the read address signal is provided to a block management memory to successively read sequences of erasure count data pieces corresponding to the blocks from the block management memory. Thereafter, when the erasure count data piece read from the block management memory represents an erasure count smaller than a minimum erasure count data piece, the erasure count data piece is imported and retained and outputted as the minimum erasure count data piece. Also, the read address signal is imported and retained and an address indicated by the read address signal is outputted as a minimum erasure count address.
申请公布号 US2015092492(A1) 申请公布日期 2015.04.02
申请号 US201414483272 申请日期 2014.09.11
申请人 LAPIS Semiconductor Co., Ltd. 发明人 MATSUMOTO Takuya;MIYAZAKI Satoshi;MAEDA Tomoyuki
分类号 G11C16/34;G11C16/08 主分类号 G11C16/34
代理机构 代理人
主权项 1. A semiconductor device comprising: a semiconductor memory in which data erasure is performed in units of blocks; a block management memory that stores, corresponding to each of the blocks, an erasure count data piece representing a data erasure count performed in the block; a read address generation circuit that generates a read address signal in response to a search start instruction and provides the read address signal to the block management memory to successively read the erasure count data pieces from the block management memory; and a minimum erasure count search circuit that searches for a block corresponding to an erasure count data piece representing a minimum erasure count from among the erasure count data pieces read from the block management memory, the minimum erasure count search circuit including: a first latch that outputs, when the erasure count data piece read from the block management memory represents an erasure count smaller than a minimum erasure count data piece, the erasure count data piece as the minimum erasure count data piece; and a second latch that outputs, when the erasure count data piece read from the block management memory represents an erasure count smaller than the minimum erasure count data piece, an address indicated by the read address signal as a minimum erasure count address.
地址 Yokohama JP