发明名称 |
SIGNAL ALIGNMENT CIRCUITRY, DATA HANDLING CIRCUITRY, SYSTEM AND IC CHIP |
摘要 |
<p>PROBLEM TO BE SOLVED: To provide signal alignment circuitry that enables synchronization within each channel and between channels.SOLUTION: The signal alignment circuitry has: phase rotation circuitry connected to receive input clock signals and operable to generate output clock signals from the input clock signals; and control circuitry operable to control an amount of phase rotation applied by the phase rotation circuitry so as to carry out a plurality of alignment operations. The alignment operations include: a first operation including rotating any output clock signal(s) relative to the other output clock signal(s) so as to bring a phase relationship between the output clock signals or derived clock signals derived from the output clock signals into a given phase relationship; and a second operation including rotating all of the output clock signals together so as to bring a phase relationship between the output clock signals or the derived clock signals and the input clock signals or an external reference signal into a given phase relationship.</p> |
申请公布号 |
JP2015056886(A) |
申请公布日期 |
2015.03.23 |
申请号 |
JP20140165387 |
申请日期 |
2014.08.15 |
申请人 |
FUJITSU SEMICONDUCTOR LTD |
发明人 |
DEDIC IAN JUSO;GAVIN LAMBERTUS ALLEN |
分类号 |
H03M1/12;H03M1/66 |
主分类号 |
H03M1/12 |
代理机构 |
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代理人 |
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主权项 |
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地址 |
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