INTERPOSER AND SEMICONDUCTOR PACKAGE USING THE SAME, AND METHOD OF MANUFACTURING INTERPOSER

摘要

The present invention is to improve electrical properties and to reduce manufacturing cost and time at the same time. Suggested is an interposer which includes an interposer substrate which is formed by stacking one or more insulating layers and has interlayer connection through a via; a cavity which penetrates the center of the interposer substrate in a thickness direction; and a connection electrode which has a post part formed in at least one of the upper side and the lower side of the interposer substrate.