发明名称 集積回路チップ及びその形成方法
摘要 <p>PROBLEM TO BE SOLVED: To provide a high performance system on-chip using a post passivation method. SOLUTION: Electric elements of high quality (e.g. inductor, capacitor or resistor) are formed on a passivation layer 18 or a surface of a thick polymer layer 20. A method further provides a method for mounting a discrete electronic element in the state that the element is isolated from a surface of a lower silicon substrate 10 to some extent.</p>
申请公布号 JP5683765(B2) 申请公布日期 2015.03.11
申请号 JP20010267522 申请日期 2001.09.04
申请人 发明人
分类号 H01L21/822;H01L23/52;H01L21/3205;H01L21/768;H01L23/522;H01L23/532;H01L27/04 主分类号 H01L21/822
代理机构 代理人
主权项
地址