Highly compact non-volatile memory and method thereof

摘要

A non-volatile memory device capable of reading and writing a large number of memory cells with multiple read/write circuits in parallel has an architecture that reduces redundancy in the multiple read/write circuits to a minimum. The multiple read/write circuits are organized into a bank of similar stacks of components. In one aspect, each stack of components has individual components factorizing out their common subcomponents that do not require parallel usage and sharing them as a common component serially. Other aspects, include serial bus communication between the different components, compact I/O enabled data latches associated with the multiple read/write circuits, and an architecture that allows reading and programming of a contiguous row of memory cells or a segment thereof. The various aspects combined to achieve high performance, high accuracy and high compactness.

主权项

1. A method of reading or writing an array of non-volatile memory cells, comprising:
providing a set of read/write circuits; coupling said set of read/write circuits to an entire row of memory cells in the array in parallel via a corresponding set of bit lines, the entire row of memory cells being contiguous and adjacent to each other along the row; and operating said set of read/write circuits to read or write on said entire row of memory cells in parallel, wherein said set of read/write circuits includes a corresponding set of read/write modules coupled to the corresponding set of bit lines, and wherein said array of non-volatile memory cells is organized into erasable blocks of EEPROM cells.