| 摘要 |
<p>The present technique relates to a semiconductor device capable of greatly reducing the occupied areas of a transistor and a method for fabricating the same. A semiconductor device according to the present technique may include a first transistor which includes a first pillar on the substrate and a first gate electrode around the first pillar; a second transistor which a second pillar which is adjacent to the first transistor and is on a substrate, and a second gate electrode around the second pillar; a first conductive line connected to the first gate electrode; and a second conductive line which is located in a surface level higher than the first conducive line, and is connected to the second gate electrode.</p> |
