发明名称 半導体装置の製造方法および半導体装置
摘要 <p><P>PROBLEM TO BE SOLVED: To provide a manufacturing method of a semiconductor device and a semiconductor device for decreasing resistance at a channel portion and lowering a threshold voltage without an epitaxial growth process, limitation on a taper angle of a trench and limitation of a substrate. <P>SOLUTION: A MOSFET as a semiconductor device is manufactured by the steps of forming a channel layer 14 by performing ion implantation of an n type impurity using a silicon oxide layer 25 as an implantation mask opening in such a way as to expose a predetermined portion of a source region 14 where a trench is to be formed, forming a trench penetrating the source region 14 and a base region 13 by etching the source region 14 and the base region 13 using the silicon oxide layer 25 as an etching mask, sequentially forming a gate insulation film and a gate electrode in the trench, forming a source electrode electrically connecting the source region 14 and the base region 13 after coating the gate electrode with an interlayer insulation film, and forming a drain electrode on an n type silicon carbide substrate 11. <P>COPYRIGHT: (C)2012,JPO&INPIT</p>
申请公布号 JP5676923(B2) 申请公布日期 2015.02.25
申请号 JP20100126614 申请日期 2010.06.02
申请人 发明人
分类号 H01L29/78;H01L21/336;H01L29/12 主分类号 H01L29/78
代理机构 代理人
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