NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND METHOD OF FABRICATING THE SAME

摘要

According to an aspect of the invention, a first insulating layer is buried in a first trench provided in at least one of an interstice between first and second semiconductor pillars, a side surface portion of the first semiconductor pillar opposed to the second semiconductor pillar, and a side surface portion of the second semiconductor pillar opposed to the first semiconductor pillar. A first trench penetrates each stack from an uppermost portion of the stack to a first conductive layer in a lowermost portion of the stack. The first trench is arranged away from a first connection portion. Each of the first conductive layers in contact with the first insulating layer includes a silicide layer.

主权项

1. A nonvolatile semiconductor memory device comprising:
a plurality of stacks arranged side by side in a first direction, and extending in a second direction orthogonal to the first direction, in a plane in parallel with a substrate, each stack including a plurality of first conductive layers stacked above the substrate with insulating layers interposed between the first conductive layers; a plurality of first memory strings including a first semiconductor pillar, a second semiconductor pillar and a first connection portion, respectively, the first and second semiconductor pillars penetrating each stack in a way to reach a back gate layer above the substrate, the first connection portion being provided in a surface of the back gate layer, one end of the first connection portion being connected to a lower end of the first semiconductor pillar, the other end of the first connection portion being connected to a lower end of the second semiconductor pillar, a memory layer being provided in an outer side portion of the first semiconductor pillar, the second semiconductor pillar and the first connection portion, a first semiconductor layer being provided in an inner side portion of the first semiconductor pillar, the second semiconductor pillar and the first connection portion, and the plurality of first memory strings being arranged side by side in the second direction; and a first insulating layer buried in a first trench provided in at least one of an interstice between the first and second semiconductor pillars, a side surface side of the first semiconductor pillar opposed to the second semiconductor pillar, and a side surface side of the second semiconductor pillar opposed to the first semiconductor pillar, in the first direction, the first trench penetrating each stack from an uppermost portion of the stack to the first conductive layer in a lowermost portion of the stack, the first trench being arranged away from the first connection portion, and the first trenches being arranged side by side in the second direction, wherein each of the first conductive layers in contact with the first insulating layer includes a silicide layer.