发明名称 Strained semiconductor device and method of making the same
摘要 In a method for forming a semiconductor device, a gate electrode is formed over a semiconductor body (e.g., bulk silicon substrate or SOI layer). The gate electrode is electrically insulated from the semiconductor body. A first sidewall spacer is formed along a sidewall of the gate electrode. A sacrificial sidewall spacer is formed adjacent the first sidewall spacer. The sacrificial sidewall spacer and the first sidewall spacer overlying the semiconductor body. A planarization layer is formed over the semiconductor body such that a portion of the planarization layer is adjacent the sacrificial sidewall spacer. The sacrificial sidewall spacer can then be removed and a recess etched in the semiconductor body. The recess is substantially aligned between the first sidewall spacer and the portion of the planarization layer. A semiconductor material (e.g., SiGe or SiC) can then be formed in the recess.
申请公布号 US8946034(B2) 申请公布日期 2015.02.03
申请号 US201314087918 申请日期 2013.11.22
申请人 Infineon Technologies AG 发明人 Tews Helmut Horst;Schenk Andre
分类号 H01L21/336;H01L27/12;H01L29/66;H01L29/78;H01L21/8238 主分类号 H01L21/336
代理机构 Slater & Matsil, L.L.P. 代理人 Slater & Matsil, L.L.P.
主权项 1. A method of fabricating a semiconductor device, the method comprising: forming a first gate electrode and a second gate electrode over a semiconductor body, the first and second gate electrodes being electrically insulated from the semiconductor body; forming a first sidewall spacer along a first sidewall of the first gate electrode and a second sidewall spacer along a second sidewall of the second gate electrode; forming first and second sacrificial sidewall spacers, the first sacrificial sidewall spacer adjacent the first sidewall spacer, and the second sacrificial sidewall spacer adjacent the second sidewall spacer; forming a planarization layer between the first and second sacrificial sidewall spacers; removing the first and second sacrificial sidewall spacers thereby exposing a first region and a second region of the semiconductor body; etching the first region and the second region thereby forming first and second recesses in the semiconductor body; forming a first semiconductor material in the first recess; and forming a second semiconductor material in the second recess, wherein there is no isolation region between the first recess and the second recess.
地址 Neubiberg DE