Apparatus and method for protection of precision mixed-signal electronic circuits

摘要

Apparatus and methods for precision mixed-signal electronic circuit protection are provided. In one embodiment, an apparatus includes a p-well, an n-well, a poly-active diode structure, a p-type active region, and an n-type active region. The poly-active diode structure is formed over the n-well, the p-type active region is formed in the n-well on a first side of the poly-active diode structure, and the n-type active region is formed along a boundary of the p-well and the n-well on a second side of the poly-active diode structure. During a transient electrical event the apparatus is configured to provide conduction paths through and underneath the poly-active diode structure to facilitate injection of carriers in the n-type active region. The protection device can further include another poly-active diode structure formed over the p-well to further enhance carrier injection into the n-type active region.

主权项

1. An apparatus for providing protection from transient electrical events, the apparatus comprising:
a semiconductor substrate; a first well disposed in the semiconductor substrate; a second well disposed in the semiconductor substrate adjacent the first well, wherein the second well has a doping type opposite a doping type of the first well; a first gate structure disposed over the second well; a first active region disposed on a first side of the first gate structure along a boundary of the first and second wells; a second active region disposed on a second side of the first gate structure in the second well, wherein the second active region has a doping type opposite a doping type of the first active region; a third active region disposed in the first well, wherein the third active region has a doping type the same as the doping type of the first active region; a second gate structure disposed over the first well, wherein the first active region is disposed on a first side of the second gate structure; a third well disposed in the semiconductor substrate on a side of the second well opposite the first well, wherein the third well has a doping type that is the same as the doping type of the first well; and an isolation layer disposed in the semiconductor substrate and beneath the first well, the second well, and the third well, wherein the isolation layer has a doping type that is the same as the doping type of the second well, wherein during a transient overvoltage stress event the apparatus is configured to provide a first conduction path under the first gate structure and a second conduction path through the first gate structure to decrease a turn-on response time and reduce a transient breakdown voltage between the first and second wells during the transient overvoltage stress event.