发明名称 Systems and methods for current matching of LED strings
摘要 Systems and methods are provided for regulating a string current flowing through a string of one or more light emitting diodes. A system controller includes a first controller terminal, a second controller terminal and a third controller terminal. The first controller terminal is coupled to a base terminal of a bipolar junction transistor, the bipolar junction transistor further including an emitter terminal and a collector terminal, the collector terminal being connected to the string of one or more light emitting diodes. The second controller terminal is coupled to the emitter terminal of the bipolar junction transistor and to a first resistor terminal of a resistor associated with a resistance. The third controller terminal is coupled to a second resistor terminal of the resistor. In addition, the system controller is configured to receive a reference voltage, receive an emitter voltage, and output a base current.
申请公布号 US8947012(B2) 申请公布日期 2015.02.03
申请号 US201213558168 申请日期 2012.07.25
申请人 Guangzhou On-Bright Electronics Co., Ltd. 发明人 Luo Qiang;Fang Lieyi;Chen Zhiliang
分类号 G05F1/00;H05B37/02;H05B39/04;H05B41/36;H05B37/00;H05B39/00;H05B41/00;H05B33/08 主分类号 G05F1/00
代理机构 Jones Day 代理人 Jones Day
主权项 1. A system controller for regulating a string current flowing through a string of one or more light emitting diodes, the system controller comprising: a first controller terminal coupled to a base terminal of a bipolar junction transistor, the bipolar junction transistor further including an emitter terminal and a collector terminal, the collector terminal being connected to a string of one or more light emitting diodes; a second controller terminal coupled to the emitter terminal of the bipolar junction transistor and coupled to a first resistor terminal of a resistor associated with a resistance; and a third controller terminal coupled to a second resistor terminal of the resistor; wherein the system controller is configured to: receive a reference voltage;receive an emitter voltage from the emitter terminal of the bipolar junction transistor through the second controller terminal;output a base current related to the base terminal of the bipolar junction transistor through the first controller terminal based on at least information associated with the reference voltage and the emitter voltage;receive a first current related to the emitter terminal of the bipolar junction transistor through the second controller terminal, the first current being equal to the base current in magnitude; andregulate the emitter voltage to be equal to the reference voltage in magnitude; wherein the system controller further includes: an error amplifier configured to receive the reference voltage and the emitter voltage and output an amplified signal based on at least information associated with the reference voltage and the emitter voltage;a current generator configured to receive the amplified signal and generate the base current based on at least information associated with the amplified signal; anda current mirror component configured to regulate the first current to be equal to the base current in magnitude; wherein the current generator includes a first transistor including a first transistor terminal, a second transistor terminal and a third transistor terminal, the first transistor terminal being configured to receive the amplified signal, the third transistor terminal being coupled to the first controller terminal and configured to output the base current; wherein the current-mirror component includes: a second transistor including a fourth transistor terminal, a fifth transistor terminal and a sixth transistor terminal;a third transistor including a seventh transistor terminal, an eighth transistor terminal and a ninth transistor terminal;a fourth transistor including a tenth transistor terminal, an eleventh transistor terminal and a twelfth transistor terminal; anda fifth transistor including a thirteenth transistor terminal, a fourteenth transistor terminal and a fifteenth transistor terminal; wherein: the fourth transistor terminal is coupled to the seventh transistor terminal and the sixth transistor terminal;the fifth transistor terminal is coupled to the eighth transistor terminal;the sixth transistor terminal is coupled to the second transistor terminal;the tenth transistor terminal is coupled to the thirteenth transistor terminal and the fourteenth transistor terminal;the eleventh transistor terminal is coupled to the second controller terminal and configured to receive the first current;the twelfth transistor terminal is coupled to the fifteenth transistor terminal; andthe fourteenth transistor terminal is coupled to the ninth transistor terminal.
地址 CN