| 摘要 |
<p>The present disclosure provides manufacturing techniques and semiconductor devices in which performance of P-channel transistors may be enhanced on the basis of a stress mechanism that involves the deposition of a dielectric bi-layer system. Contrary to conventional strategies, an additional pre-treatment may be performed prior to the deposition of an adhesion layer in a plasma-free process atmosphere, thereby enabling a reduced thickness of the adhesion layer and a higher internal stress level of the subsequent top layer.</p> |
