发明名称 SYSTEMS AND METHODS FOR TEST TIME OUTLIER DETECTION AND CORRECTION IN INTEGRATED CIRCUIT TESTING
摘要 Methods and systems for semiconductor testing are disclosed. In one embodiment, devices which are testing too slowly are prevented from completing testing, thereby allowing untested devices to begin testing sooner.
申请公布号 US2015012237(A1) 申请公布日期 2015.01.08
申请号 US201414492392 申请日期 2014.09.22
申请人 Optimal Plus Ltd. 发明人 Balog Gil;Linde Reed;Golan Avi
分类号 G01R31/26 主分类号 G01R31/26
代理机构 代理人
主权项 1. A method of semiconductor testing comprising: while a test program is being applied to said semiconductor device, recognizing said semiconductor device as a candidate for test aborting because said device is testing too slowly based on data relating to a plurality of tests in said test program; deciding whether to abort testing on said candidate; and preventing said candidate from completing said test program, if said decision is to abort; wherein after said device has completed said test program or has been prevented from completing said test program and if there is at least one remaining untested semiconductor device, said test program is applied to at least one of said remaining untested semiconductor devices.
地址 Holon IL