Constructing equivalent waveform models for static timing analysis of integrated circuit designs

摘要

In one embodiment, a method of constructing an equivalent waveform model for static timing analysis of integrated circuit designs is disclosed. The method includes fitting time point coefficients (qk) and known time delay values from a delay and slew model of a receiving gate from a timing library; determining waveform values (Ikj) for input waveforms from the timing library; determining timing values (dj) from a timing table in the timing library in response to the input waveforms of the timing library; and determining coefficients (qk) by minimizing a residual of a delay equation.

主权项

1. A method of constructing an equivalent waveform model for static timing analysis of integrated circuit designs, the method comprising:
constructing a delay and slew model for a timing library by fitting time point coefficients and known time delay values of a receiving gate; determining waveform values for input waveforms of the receiving gate by using a lookup table from the timing library; determining timing values by using a timing equation from the timing library in response to the input waveforms of the timing library; and determining time point coefficients that minimize an error in the timing equation; wherein one or more of the fitting and determining is performed with a processor.