发明名称 OPERATING CONDITIONS COMPENSATION CIRCUIT
摘要 A circuit having a centralized PT compensation circuit to provide compensation signals to localized I/O blocks on the chip. Process variations and temperature variations tend to be approximately uniform across an integrated circuit chip. Thus, a single, centralized PT compensation circuit may be used instead of one PT compensation circuit per I/O section as with solutions of the past. Further, the PT compensation circuit may generate a digital code indicative of the effects of process and temperature. Further yet, each section of I/O block may have a local voltage compensation circuit to compensate the voltage variation of the I/O block. The voltage compensation circuit utilizes an independent reference voltage. The reference voltage is generated by the PT compensation circuit, which is placed centrally in the IC chip and hence any need to repeat the reference generation for each I/O block is eliminated.
申请公布号 US2014375357(A1) 申请公布日期 2014.12.25
申请号 US201313926748 申请日期 2013.06.25
申请人 STMicroelectronics (CROLLES 2) SAS ;STMicroelectronics Pvt Ltd 发明人 KUMAR Vinod;BADRATHWAL Pradeep Kumar;RIZVI Saiyid Mohammad Irshad;GARG Paras;CHATTERJEE Kallol;DAUTRICHE Pierre
分类号 H03K19/003 主分类号 H03K19/003
代理机构 代理人
主权项 1. An input/output drive circuit, comprising: a first drive block configured to generate an input/output drive signal for driving an input/output node; a second drive block configured to alter the input/output drive signal in response to a localized voltage compensation signal; a third drive block configured to alter the input/output drive signal in response to a centralized operating condition compensation signal.
地址 Crolles FR