发明名称 CONTACT STRUCTURE AND METHOD FOR VARIABLE IMPEDANCE MEMORY ELEMENT
摘要 <p>A memory element can include an opening formed within at least one insulating layer formed on an etch stop layer that exposes a first electrode portion and the etch stop layer at a bottom of the opening; a second electrode portion, formed on at least a side surface of the opening and in contact with the first electrode portion, the second electrode portion not filling the opening and being substantially not formed over a top surface of the at least one insulating layer; and at least one memory layer formed on a top surface of the at least one insulating layer and in contact with the second electrode portion, the at least one memory layer being reversibly programmable between at least two impedance states. Methods of forming such memory elements are also disclosed.</p>
申请公布号 KR20140145529(A) 申请公布日期 2014.12.23
申请号 KR20137033102 申请日期 2012.06.25
申请人 ADESTO TECHNOLOGIES CORPORATION 发明人 GOPALAN CHAKRAVARTHY
分类号 H01L21/30;G11C11/34;H01L21/31 主分类号 H01L21/30
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