发明名称 Method for manufacturing semiconductor device and semiconductor device
摘要 According to one embodiment, a method is disclosed for manufacturing a semiconductor device. The method includes forming a second stacked body on the planarized interlayer insulating film and on the uppermost stair. The second stacked body includes a second conductive film thicker than the first conductive film and a second insulating film stacked on the second conductive film. The method includes dividing the second stacked body into a select gate on the uppermost stair and a plurality of wall portions in a staircase region below the uppermost stair. The method includes forming a plurality of vias piercing the interlayer insulating film under a region between the wall portions and reaching the first conductive film of each of the stairs.
申请公布号 US8912593(B2) 申请公布日期 2014.12.16
申请号 US201313916069 申请日期 2013.06.12
申请人 Kabushiki Kaisha Toshiba 发明人 Matsuda Toru
分类号 H01L29/792;H01L29/66;H01L27/115 主分类号 H01L29/792
代理机构 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P. 代理人 Oblon, Spivak, McClelland, Maier & Neustadt, L.L.P.
主权项 1. A semiconductor device comprising: a first stacked body including a first insulating film and a first conductive film alternately stacked in a plurality and including a plurality of stairs processed in a staircase configuration; an interlayer insulating film provided on the stairs so as to fill a level difference between the stairs; a second stacked body provided on the interlayer insulating film and on an uppermost stair and including a second conductive film and a second insulating film provided on the second conductive film, the second conductive film being thicker than the first conductive film and including a select gate on the uppermost stair and a plurality of wall portions in a staircase region below the uppermost stair; and a plurality of vias extending in a stacking direction of the first insulating film and the first conductive film in the interlayer insulating film under a region between the wall portions and being connected to the first conductive film of each of the stairs.
地址 Minato-ku JP