| 摘要 |
<p>PROBLEM TO BE SOLVED: To suppress an increase in circuit area of a semiconductor device.SOLUTION: A provided method includes the steps of: analyzing a timing margin of a data path by a plurality of flip-flops (FF1,2; FF2,3; ...) that are included in a semiconductor device (step S1); and grouping flip-flops (FF1-11) which are included in consecutive data paths having a smaller timing margin value than a threshold value, as a plurality of flip-flop groups Ga and Gb which are driven by identical clock buffers Bfa and Bfb, in a range satisfying the electric characteristics of the clock buffers Bfa and Bfb.</p> |
