High Density Nonvolatile Memory

摘要

One embodiment of a memory cell comprising: a substrate; a first transistor comprising a first gate width and a terminal; a first plurality of resistive memory elements disposed above the first transistor, each resistive memory element comprising an element width, a first end, and a second end; a plurality of parallel conductive lines disposed above the first plurality of resistive memory elements and separately electrically coupled to the first plurality of resistive memory elements at their first ends; a second plurality of resistive memory elements disposed above the plurality of parallel conductive lines, each resistive memory element comprising the element width, the first end, and the second end and separately electrically coupled to the plurality of conductive lines at their first ends; a second transistor disposed above the second plurality of resistive memory elements and comprising a gate width and a terminal, wherein the first plurality of resistive memory elements is jointly electrically coupled to the terminal of the first transistor at their second ends; wherein the second plurality of resistive memory elements is jointly electrically coupled to the terminal of the second transistor at their second ends; and wherein the gate width is substantially larger than the element width. Other embodiments are disclosed and shown.

主权项

1. Memory cell comprising:
a thin film transistor comprising a semiconductor layer, a gate width, and a terminal; a plurality of resistive memory elements, each resistive memory element comprising an element width and two stable resistance states; and a plurality of conductive lines overlapping the terminal at a plurality of intersection regions and independently electrically coupled to the plurality of resistive memory elements at their first ends, wherein the plurality of resistive memory elements is jointly electrically coupled to the terminal at their second ends, and wherein the gate width is substantially larger than the element width.