发明名称 DATA TRANSFER CIRCUIT AND MEMORY INCLUDING THE SAME
摘要 A data transfer circuit includes a plurality of first lines, a second line suitable for receiving data from a first line selected among the first lines, a third line suitable for transferring data to the first line selected among the first lines, a plurality of driving units, each suitable for driving the second line based on the data from the corresponding first line in a first operation, and a plurality of connection units, each suitable for coupling the third line to the corresponding first line when the corresponding first line is selected in a second operation.
申请公布号 US2014355356(A1) 申请公布日期 2014.12.04
申请号 US201314057964 申请日期 2013.10.18
申请人 SK hynix Inc. 发明人 LIM Sang-Oh
分类号 G11C16/28 主分类号 G11C16/28
代理机构 代理人
主权项 1. A data transfer circuit, comprising: a plurality of first lines; a second line suitable for receiving data from a first line selected among the first lines; a third line suitable for transferring data to the first line selected among the first lines; a plurality of driving units, each suitable for driving the second line based on the data from the corresponding first line in a first operation; and a plurality of connection units, each suitable for coupling the third line to the corresponding first line when the corresponding first line is selected in a second operation.
地址 Gyeonggi-do KR