| 发明名称 |
Efficient method for memory accesses in a multi-core processor |
| 摘要 |
A method of providing memory accesses for a multi-core processor includes reserving a group of pins of a multi-core processor to transmit either data or address information in communication with one or more memory chips, receiving memory access requests from the plurality of processor cores, determining granularity of the memory access requests by a memory controller, and dynamically adjusting the number of pins in the group of pins to be used to transmit address information based with the granularity of the memory access requests. |
| 申请公布号 |
US2014351525(A1) |
申请公布日期 |
2014.11.27 |
| 申请号 |
US201314143252 |
申请日期 |
2013.12.30 |
| 申请人 |
Peking University |
发明人 |
Chen Yifeng;Cui Weilong;Cui Xiang |
| 分类号 |
G06F3/06 |
主分类号 |
G06F3/06 |
| 代理机构 |
|
代理人 |
|
| 主权项 |
1. A method of providing memory accesses for a multi-core processor, comprising:
reserving a group of pins of a multi-core processor to transmit either data or address information in communication with one or more memory chips, wherein the multi-core processor comprises a plurality of processor cores; receiving memory access requests from the plurality of processor cores; determining granularity of the memory access requests by a memory controller; and dynamically adjusting, by the memory controller, a number of pins in the group of pins to be used to transmit address information based with the granularity of the memory access requests. |
| 地址 |
Beijing CN |
