Method of back-side patterning

摘要

A method of back-side patterning of a silicon wafer is disclosed, which includes: depositing a protective layer on a front side of a silicon wafer; forming one or more deep trenches through the protective layer and extending into the silicon wafer by a depth greater than a target thickness of the silicon wafer; flipping over the silicon wafer and bonding the front side of the silicon wafer with a carrier wafer; polishing a back side of the silicon wafer; performing alignment by using the one or more deep trench alignment marks and performing back-side patterning process on the back side of the silicon wafer; and de-bonding the silicon wafer with the carrier wafer.

主权项

1. A method of back-side patterning, comprising the following steps in the sequence set forth:
depositing a protective layer on a front side of a silicon wafer; forming, on the front side of the silicon wafer, one or more deep trenches to serve as one or more deep trench alignment marks for back-side patterning, the one or more deep trenches being formed through the protective layer and extending into the silicon wafer, each of the one or more deep trenches extending into the silicon wafer by a depth greater than a target thickness of the silicon wafer and being not filled with any material so that the one or more deep trench alignment marks remain hollow; flipping over the silicon wafer and bonding the front side of the silicon wafer with a carrier wafer; polishing a back side of the silicon wafer by using Taiko polishing process until a thickness of a central portion of the silicon wafer is reduced to the target thickness and the one or more hollow deep trench alignment marks are exposed from the back side of the silicon wafer, such that a support ring having a thickness greater than the thickness of the central portion of the silicon wafer is formed at an edge portion of the silicon wafer; performing alignment by using the one or more hollow deep trench alignment marks and performing back-side patterning process on the back side of the silicon wafer; de-bonding the silicon wafer with the carrier wafer; and removing the support ring.