Display driving circuit, display device and display driving method

摘要

A display driving circuit that carries out CC driving is configured such that retaining circuits are provided in such a way as to correspond one-by-one to their respective stages of a shift register, that a polarity signal CMI is inputted to each of the latch circuits, that when an internal signal Mn generated by a shift register at the nth stage becomes active, a latch circuit corresponding to the nth stage loads and retains the polarity signal CMI, that an output signal SRBOn from the shift register at the nth stage is supplied as a scanning signal to a gate line connected to pixels corresponding to the (n+1)th stage, and that an output from latch circuit corresponding to the nth stage is supplied as CSOUTn to a CS bus line forming capacitors with pixel electrodes of pixels corresponding to the nth stage.

主权项

1. A display driving circuit for use in a display device in which by supplying retention capacitor wire signals to retention capacitor wires forming capacitors with pixel electrodes included in pixels, signal potentials written into the pixel electrodes are changed in a direction corresponding to polarities of the signal potentials, the display driving circuit comprising:
a shift register including a plurality of stages provided in such a way as to correspond to a plurality of scanning signal lines, respectively, the display driving circuit having retaining circuits provided in such a way as to correspond one-by-one to the stages of the shift register, a first clock signal being inputted to a current stage of the shift register, a second clock signal different in phase from the first clock signal being inputted to a subsequent stage of the shift register which subsequent stage follows the current stage of the shift register, the current stage of the shift register generating a first control signal and supplying the first control signal to a retaining circuit corresponding to the current stage, the subsequent stage of the shift register generating a second control signal and supplying the second control signal to a retaining circuit corresponding to the subsequent stage, a retention target signal being inputted to each of the retaining circuits, when the first control signal generated by the current stage of the shift register becomes active, the retaining circuit corresponding to the current stage loading and retaining the retention target signal, an output signal from the current stage of the shift register being supplied as a scanning signal to a scanning signal line connected to pixels corresponding to the current stage, the output signal being also supplied to the subsequent stage of the shift register, the subsequent stage of the shift register generating the second control signal in response to the output signal and the second clock signal and supplying the second control signal to the retaining circuit corresponding to the subsequent stage, an output from the retaining circuit corresponding to the current stage being supplied as the retention capacitor wire signal to a retention capacitor wire forming capacitors with pixel electrodes of pixels corresponding to a previous stage preceding the current stage, whereby, during a first vertical scanning period during which a data signal corresponding to a video image to be displayed starts to be outputted, a direction of change of signal potentials written into pixel electrodes of the pixels corresponding to the current stage of the shift register being differentiated from that of change of signal potentials written into pixel electrodes of pixels corresponding to the subsequent stage of the shift register.