Self-defining, low capacitance wire bond pad

摘要

A bond pad region is provided that reduces parasitic capacitance generated between bond pad metallization and underlying silicon by reducing the effective area of the bond pad, while maintaining flexibility of wire bond sites and ensuring mechanical integrity of the wire bonds. Embodiments provide, in a region that would be populated by a traditional bus bar bond pad, a small bus bar bond pad that is less than half the area of the region and populating at least a portion of the remaining area with metal tiles that are not electrically connected to the small bus bar bond pad or to each other. The metal tiles provide an attachment area for at least a portion of one or more wire bonds. Only those tiles involved in connection to a wire bond contribute to parasitic capacitance, along with the small bus bar pad.

主权项

1. A semiconductor device comprising:
an active device region; a bond pad region, wherein the bond pad region comprises
a first bond pad electrically coupled to the active device region,a plurality of bond pad tiles electrically isolated from the first bond pad, each other of the bond pad tiles, and the active device region; and a wire bond formed on the first bond pad and a subset of the plurality of bond pad tiles.