发明名称 Semiconductor memory device
摘要 An object is to increase the retention characteristics of a memory device formed using a semiconductor with a wide bandgap, such as an oxide semiconductor. A transistor including a back gate (a back gate transistor) is inserted in series at one end of a bit line so that the back gate is constantly at a sufficiently negative potential. The minimum potential of the bit line is set higher than that of a word line. When power is turned off, the bit line is cut off by the back gate transistor, ensuring prevention of outflow of charge accumulated in the bit line. At this time, the potential of a source or a drain (bit line) of a cell transistor is sufficiently higher than that of a gate of the cell transistor (0 V), so that the cell transistor is put in a sufficiently off state; thus, data can be retained.
申请公布号 US8891285(B2) 申请公布日期 2014.11.18
申请号 US201213478215 申请日期 2012.05.23
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Takemura Yasuhiko
分类号 G11C11/24;G11C11/4094;G11C11/4076;G11C11/406;G11C11/403;G11C11/4074 主分类号 G11C11/24
代理机构 Fish & Richardson P.C. 代理人 Fish & Richardson P.C.
主权项 1. A semiconductor memory device comprising: a column driver; a bit line; a word line; a memory cell comprising a first transistor and a capacitor; a second transistor including a back gate; and a third transistor including a back gate, wherein a source of the first transistor is electrically connected to the bit line, wherein a drain of the first transistor is electrically connected to one electrode of the capacitor, wherein a gate of the first transistor is electrically connected to the word line, wherein a drain of the second transistor is electrically connected to the bit line, wherein a source of the second transistor is electrically connected to the column driver, wherein a potential of the back gate of the second transistor is lower than a minimum potential of the word line, and wherein the third transistor is provided between the column driver and the second transistor.
地址 Kanagawa-ken JP