发明名称 |
SEMICONDUCTOR DEVICE |
摘要 |
There is provided a semiconductor device having: a latch circuit having a plurality of data holding nodes; a first capacitance element connected to the first data holding node included in the plurality of data holding nodes; and a first switch element provided between the first data holding node and the first capacitance element. |
申请公布号 |
US2014333363(A1) |
申请公布日期 |
2014.11.13 |
申请号 |
US201414337514 |
申请日期 |
2014.07.22 |
申请人 |
FUJITSU SEMICONDUCTOR LIMITED |
发明人 |
Uemura Taiki;Tosaka Yoshiharu |
分类号 |
H03K3/3562 |
主分类号 |
H03K3/3562 |
代理机构 |
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代理人 |
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主权项 |
1. A semiconductor device comprising:
a first inverter; first and second p-channel MOS field-effect transistors coupled in series between a power supply voltage node and an input terminal of the first inverter; first and second n-channel MOS field-effect transistors coupled in series between the input terminal of the first inverter and a reference potential node; and a first capacitance element coupled to an interconnection node of the first and second p-channel MOS filed effect transistors or an interconnection node of the first and second re-channel MOS field-effect transistors, wherein gates of the first p-channel MOS field-effect transistor and the second n-channel MOS field-effect transistor are coupled to an output terminal of the first inverter, and wherein gates of the second p-channel MOS field-effect transistor and the first n-channel MOS field effect transistor are coupled to nodes of clock signals which are inverted to each other. |
地址 |
Yokohama-shi JP |