发明名称 HIGH-SPEED LOW POWER V/I CONVERTER FOR CLOCK AND DATA RECOVERY CIRCUIT
摘要 In the present invention, suggested is a V/I converter for a clock and data recovery circuit for high speed and low power operations. Clock signals are generated by comparing the clock information of data with reference clock information through a phase detector which does not require XOR logic, and a control voltage is generated through the V/I converter which directly uses the clock signals as an input. The phase detector compares the clock information using four latches. The latch reduces current consumption by making a current flow for a half period of the clock and obtains a large gain by removing an inverter which is alternatively connected to store the data. The latch is connected with a cascade method and outputs the output data of the same pattern as an input pattern.
申请公布号 KR20140129544(A) 申请公布日期 2014.11.07
申请号 KR20130047959 申请日期 2013.04.30
申请人 INHA-INDUSTRY PARTNERSHIP INSTITUTE 发明人 KANG, JIN KU;AN, TAEK JOON
分类号 H03L7/097;H03F3/45 主分类号 H03L7/097
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