发明名称 Serial-parallel conversion circuit, method for driving the same, display device, and semiconductor device
摘要 A serial-parallel conversion circuit for converting a high-speed serial signal to a parallel signal is provided. Further, a display device with high image quality and fewer external connection terminals is provided. Furthermore, a method for driving a serial-parallel conversion circuit for converting a high-speed serial signal to a parallel signal is provided. A serial-parallel conversion circuit includes a plurality of units in each of which a sampling switch and an amplifier are connected to each other. In the serial-parallel conversion circuit, each sampling switch is configured to output part of a serial signal to its respective amplifier only through one transistor.
申请公布号 US8878706(B2) 申请公布日期 2014.11.04
申请号 US201313753937 申请日期 2013.01.30
申请人 Semiconductor Energy Laboratory Co., Ltd. 发明人 Fujita Masashi
分类号 H03M9/00;H03K17/041;G09G5/00 主分类号 H03M9/00
代理机构 Husch Blackwell LLP 代理人 Husch Blackwell LLP
主权项 1. A semiconductor device comprising: a input portion; a first signal line; a second signal line; an output portion; and m units (m is a natural number greater than or equal to 1) each comprising: a first transistor;a second transistor;a third transistor;a capacitor; andan amplifier;wherein a gate of the first transistor is electrically connected to the first signal line,wherein a gate of the second transistor is electrically connected to the second signal line,wherein one of a source of the first transistor and a drain of the first transistor is electrically connected to a first potential line,wherein one of a source of the second transistor and a drain of the second transistor is electrically connected to the other of the source of the first transistor and the drain of the first transistor,wherein the other of the source of the second transistor and the drain of the second transistor is electrically connected to a second potential line,wherein a gate of the third transistor is electrically connected to the other of the source of the first transistor and the drain of the first transistor,wherein one of a source of the third transistor and a drain of the third transistor is electrically connected to the input portion,wherein a first electrode of the capacitor is electrically connected to the other of the source of the third transistor and the drain of the third transistor,wherein a second electrode of the capacitor is electrically connected to a third potential line,wherein an input terminal of the amplifier is electrically connected to the other of the source of the third transistor and the drain of the third transistor, andwherein an output terminal of the amplifier is electrically connected to the output portion.
地址 JP