发明名称 |
Transistors and method for making ohmic contact to transistors |
摘要 |
A transistor device having non-alloyed ohmic contacts formed by a process that improves the contact morphology and reduces metal spiking into the semiconductor layers. During fabrication, a regrowth mask is deposited on the semiconductor device. A portion of the regrowth mask and the epitaxial semiconductor layers is removed, defining areas for selective regrowth of a highly-doped semiconductor material. The remaining portion of the regrowth mask forms a regrowth mask residual layer. After regrowth, ohmic contacts are formed on the regrowth structures without the use of a high-temperature annealing process. The regrowth mask residual layer does not need to be removed, but rather remains on the device throughout fabrication and can function as a passivation layer and/or a spacer layer. |
申请公布号 |
US8878245(B2) |
申请公布日期 |
2014.11.04 |
申请号 |
US200711904064 |
申请日期 |
2007.09.25 |
申请人 |
Cree, Inc. |
发明人 |
Parikh Primit;Heikman Sten |
分类号 |
H01L29/66;H01L29/45;H01L29/778;H01L29/20 |
主分类号 |
H01L29/66 |
代理机构 |
Koppel, Patrick, Heybl & Philpott |
代理人 |
Koppel, Patrick, Heybl & Philpott |
主权项 |
1. A transistor device, comprising:
at least one semiconductor layer; a regrowth mask residual layer on at least a portion of said at least one semiconductor layer, said regrowth mask residual layer comprising a gate trench; a plurality of regrowth structures comprising a highly doped semiconductor material, said regrowth structures on different portions of said at least one semiconductor layer than the portion covered by said regrowth mask residual layer, wherein a top surface of each of said regrowth structures is below a top surface of said at least one semiconductor layer, said regrowth structures on respective portions of said at least one semiconductor layer; a drain contact and a source contact, each disposed on a different one of said regrowth structures; a gate disposed on said regrowth mask residual layer and electrically coupled to said at least one semiconductor layer through said gate trench. |
地址 |
Goleta CA US |