发明名称 |
3D VARIABLE RESISTANCE MEMORY DEVICE AND METHOD OF MANUFACTURING THE SAME |
摘要 |
A variable resistance memory device includes a plurality of cell gate electrodes extending in a first direction, wherein the plurality of cell gate electrodes are stacked in a second direction that is substantially perpendicular to the first direction. A gate insulating layer surrounds each cell gate electrode of the plurality of cell gate electrodes and a cell drain region is formed on two sides of the each cell gate electrode of the plurality of cell gate electrodes. A channel layer extends in the second direction along the stack of the plurality of cell gate electrodes, and a variable resistance layer contacting the channel layer. |
申请公布号 |
US2014321193(A1) |
申请公布日期 |
2014.10.30 |
申请号 |
US201313975639 |
申请日期 |
2013.08.26 |
申请人 |
SK hynix Inc. |
发明人 |
PARK Nam Kyun |
分类号 |
H01L45/00;G11C13/00;H01L43/02 |
主分类号 |
H01L45/00 |
代理机构 |
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代理人 |
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主权项 |
1. A variable resistance memory device, comprising:
a semiconductor substrate; a common source region formed on the semiconductor layer; a channel layer formed substantially perpendicular to a surface of the semiconductor substrate, the channel layer being selectively connected to the common source region; a plurality of cell gate electrodes formed along a side of the channel layer; a gate insulating layer formed around each cell gate electrode, of the plurality of cell gate electrodes; a cell drain region located between the each cell gate electrode of the plurality of cell gate electrodes; a variable resistance layer formed along another side of the channel layer; and a bit line electrically connected to the channel layer and the variable resistance layer. |
地址 |
Gyeonggi-do KR |