| 摘要 |
According to one embodiment, a transmitter includes a first buffer, a second buffer, a logic circuit, and a class E power amplifier. The first buffer receives a first sinusoidal signal, and converts the first sinusoidal signal to a first rectangular wave signal. The second buffer receives a second sinusoidal signal having a phase delay with respect to the first sinusoidal signal, and converts the second sinusoidal signal to a second rectangular wave signal. The logic circuit receives the first and second rectangular wave signals, and performs logical operation processing on the first and second rectangular wave signals to generate a logic signal with a predetermined duty cycle. The class E power amplifier receives the logic signal, and performs amplification operation based on the logic signal. |
| 主权项 |
1. A transceiver, comprising:
a voltage controlled oscillator to generate a first sinusoidal signal and a second sinusoidal signal having a 90° (λ/4) phase delay with respect to the first sinusoidal signal; a mixer to receive the first and second sinusoidal signals; a first buffer to receive the first sinusoidal signal, the first buffer to convert the first sinusoidal signal to a first rectangular wave signal; a second buffer to receive the second sinusoidal signal, the second buffer to convert the second sinusoidal signal to a second rectangular wave signal; a logic circuit to receive the first and second rectangular wave signals, the logic circuit to perform logical operation processing on the first and second rectangular wave signals to generate a logic signal with a duty cycle of 25% which contains 25% high level intervals and 75% low level intervals; and an power amplifier to receive the logic signal, the power amplifier to perform amplification operation based on the logic signal. |
