发明名称 SEMICONDUCTOR PACKAGES AND METHODS OF PACKAGING SEMICONDUCTOR DEVICES
摘要 Package substrate, semiconductor packages and methods for forming a semiconductor package are presented. The package substrate includes a base substrate having first and second major surfaces and a plurality of via contacts extending through the first to the second major surfaces of the base substrate. A first conductive layer having a plurality of openings is disposed over the first surface of the base substrate and via contacts. The openings are configured to match conductive trace layout of the package substrate. Conductive traces are disposed over the first conductive layer. The conductive traces are directly coupled to the via contacts through some of the openings of the first conductive layer.
申请公布号 SG10201400587Y(A) 申请公布日期 2014.10.30
申请号 SG10201400587Y 申请日期 2014.03.12
申请人 UNITED TEST AND ASSEMBLY CENTER LTD 发明人 CHUEN KHIANG WANG
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