发明名称 Semiconductor device having groove-shaped via-hole
摘要 The semiconductor device has insulating films 40, 42 formed over a substrate 10; an interconnection 58 buried in at least a surface side of the insulating films 40, 42; insulating films 60, 62 formed on the insulating film 42 and including a hole-shaped via-hole 60 and a groove-shaped via-hole 66a having a pattern bent at a right angle; and buried conductors 70, 72a buried in the hole-shaped via-hole 60 and the groove-shaped via-hole 66a. A groove-shaped via-hole 66a is formed to have a width which is smaller than a width of the hole-shaped via-hole 66. Defective filling of the buried conductor and the cracking of the inter-layer insulating film can be prevented. Steps on the conductor plug can be reduced. Accordingly, defective contact with the upper interconnection layer and the problems taking place in forming films can be prevented.
申请公布号 US8872353(B2) 申请公布日期 2014.10.28
申请号 US201313780311 申请日期 2013.02.28
申请人 Fujitsu Semiconductor Limited 发明人 Watanabe Kenichi
分类号 H01L23/48;H01L29/06;H01L23/532;H01L23/528;H01L23/522;H01L23/58;H01L23/485 主分类号 H01L23/48
代理机构 Westerman, Hattori, Daniels & Adrian, LLP 代理人 Westerman, Hattori, Daniels & Adrian, LLP
主权项 1. A semiconductor device comprising: a substrate; a first insulating film formed on the substrate; an aluminum layer formed above the first insulating film; a first guard ring which includes a first groove-shaped via-hole formed in the first insulating film and a first conductor formed in the first groove-shaped via-hole, the first conductor being connected to the substrate; and a second guard ring which includes a second groove-shaped via-hole formed in the first insulating film and a second conductor formed in the second groove-shaped via-hole, the second conductor being connected to the substrate, wherein: the second guard ring is surrounded by the first guard ring in a plan view; the first guard ring is connected to the aluminum layer; and each of the first groove-shaped via-hole, the second groove-shaped via-hole, the first conductor and the second conductor includes a pattern bent twice each time at an inner angle of larger than 90 degree at each of four corners of the semiconductor device in a plan view.
地址 Yokohama JP