发明名称 |
DIGITAL SIGNAL PROCESSING FOR PLC COMMUNICATIONS HAVING COMMUNICATION FREQUENCIES |
摘要 |
Aspects of the present disclosure are directed toward receiver devices and methods of using receiver devices. One such method can include converting, using an analog-to-digital converter (ADC), and an analog input signal from power distribution lines that carry power using alternating current (AC) to a digital form. This input digital signal can be an oversampled digital signal, where the digital signal is oversampled relative to downstream processing (e.g., FFT-based processing). A processing circuit(s) can then be used to decimate the input digital signal according to a decimation rate. A reference signal can be generated by the processing circuit that is responsive to the decimation rate. The processing circuit can also be used to detect a change in a phase difference between the AC and reference signal and to modify, in response to detecting a change in the phase difference, the decimation rate to counteract the detected change in the phase difference. |
申请公布号 |
US2014314161(A1) |
申请公布日期 |
2014.10.23 |
申请号 |
US201414287835 |
申请日期 |
2014.05.27 |
申请人 |
Landis+Gyr Technologies, LLC |
发明人 |
Haug Stuart L.;Wolter Chad;Johnson Bryce D. |
分类号 |
H04B3/54 |
主分类号 |
H04B3/54 |
代理机构 |
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代理人 |
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主权项 |
1. A circuit-based apparatus comprising:
a transceiver circuit configured and arranged to communicate data over power distribution lines that carry power using alternating current (AC); and a logic circuit configured and arranged to
generate an input digital signal from an analog signal received at the transceiver circuit,produce, in response to a variable decimation rate, a decimated input digital signal, andin response to an indication of change in a phase difference between a reference signal and the AC, control the decimation rate to counteract the phase difference. |
地址 |
Pequot Lakes MN US |